A single-chip NMOS analog front-end LSI for modems
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概要
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This paper presents a fully integrated analog front-end LSI chip which is an interface system between digital signal processors and existing analog telecommunication networks. The developed analog LSI chip includes many high level function blocks such as A/D and D/A converters with 11 bit resolution, various kinds of SCF's, an agc circuit, an external control level adjuster, a carrier detector, and a zero crossing detector. Design techniques employed are mainly directed toward circuit size reductions. The LSI chip is fabricated in a 5 mu m line double polysilicon gate NMOS process. Chip size is 7. 14 multiplied by 6. 51 mm. The circuit operates on plus or minus 5 v power supplies. Typical power consumption is 270 mw. By using this analog front-end LSI chip and a digital signal processor, modern systems can be successfully constructed in a compact size.
- IEEE = Institute of Electrical and Electronics Engineersの論文
- 1982-12-00
IEEE = Institute of Electrical and Electronics Engineers | 論文
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