A WN_x Gate Self-Aligned GaAs p-Channel MESFET for Complementary Logic

概要

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The Schottky barrier of reactively sputtered WN_x to p-type GaAs has been investigated. Postdeposition heat treatments above 500°C led to a reduction in the barrier height but for lamp annealing at 740°C the barrier heights are 0.68 eV. Self-aligned p-channel MESFET's were fabricated with WN_x gates by a refractory metal process involving the above heat treatment. The Schottky-barrier heights were close to the expected values. K-values of FET's with 2 μm × 24 μm gates were 0.088 mA/V^2, consistent with previously reported results. SPICE simulation studies carried out for a variety of complementary-type logic gates, indicate that power dissipation × delay time products of less than 10 fJ may be achievable over the power range 5-50 μW/gate. Thus complementary logic may be useful for applications where low power dissipation is at a premium.
Institute of Electrical and Electronics Engineers (IEEE)の論文
1987-02-00