Accurate I/O Buffer Impedance Self-adjustment using Threshold Voltage and Temperature Sensors (VLSI設計技術)
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概要
- 論文の詳細を見る
With the increased operating frequency and the reduction of feature size, achieving low error-rate data transmission between LSIs is an important field of research. In particular, input/output (I/O) impedance matching, as one of the necessary technologies for high-speed transmission, is strongly required. In this paper, we propose an architecture of output buffer whose impedance is self-adjustable against process variation and temperature characteristic of MOS transistors. The proposed architecture utilizes on-chip sensor circuits to capture threshold voltages and temperatures. Based on a commercial 65 nm CMOS technology. The proposed method has been verified. Without the use of reference resistor, it successfully adjusts the I/O impedance within 2.36% and 1.4% around a target of 50Ω through simulation and measurement, respectively, regardless of the process parameters and temperature.
- 2012-11-19
著者
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Tsutsui Hiroshi
Dept. Of Communications And Computer Eng. Graduate School Of Informatics Kyoto Univ.
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Ochi Hiroyuki
Dept. Of Communications And Computer Eng. Graduate School Of Informatics Kyoto University
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Tsutsui Hiroshi
Department Of Communications And Computer Engineering Graduate School Of Informatics Kyoto Universit
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Li Zhi
Department Of Communications And Computer Engineering Graduate School Of Informatics Kyoto Universit
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Sato Takashi
Dept. Of Communications And Computer Eng. Graduate School Of Informatics Kyoto University
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LI Zhi
Dept. of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
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SATO Takashi
Dept. of Civil Eng., Osaka University
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