Achieving Near-Optimal Dependability with Minimal Hardware Costs in an FU Array Processor by Soft Error Rate Monitoring
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概要
- 論文の詳細を見る
From the program characteristics of applications like image processing, the loop index to control the accessing of all pixels is relatively more important than the pixel data themselves. This assumption can be usually used to effectively balance the fault toleration coverage and the hardware cost to achieve a dependable execution with tolerable error rates, especially when the fault rate is not high . However, it can also be expected that when the fault rate exceeds some boundary, this partial error coverage will go unreliable. Furthermore, it also loses the track of the current error information due to the incomplete coverage. For this purpose, we propose methods to help make a decision about the switching between partial and full redundancies by dynamically monitoring the soft error rate. From our experiment results, our method can achieve a steady dependability with a smallest hardware cost in an FU array based processor.
- 2012-07-25
著者
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Jun Yao
Nara Institute of Science and Technology
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Yasuhiko Nakashima
Nara Institute of Science and Technology
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Tanvir Ahmed
Nara Institute Of Science & Technology
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Tanvir Ahmed
Computing Architecture Lab, Graduate School of Information Science, Nara Institute of Science and Te
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Jun Yao
Computing Architecture Lab, Graduate School of Information Science, Nara Institute of Science and Te
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Yasuhiko Nakashima
Computing Architecture Lab, Graduate School of Information Science, Nara Institute of Science and Te
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