Adaptive Error Compensation for Low Error Fixed-Width Squarers(Computer Components)
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概要
- 論文の詳細を見る
In this paper, we present a design method for fixed-width squarer that receives an n-bit input and produces an n-bit squared product. To efficiently compensate for the truncation error, modified Booth-folding encoder signals are used for the generation of error compensation bias. The truncated bits are divided into two groups (major and minor) depending upon their effects on the truncation error. Then, different error compensation methods are applied to each group. By simulations, it is shown that the proposed fixed-width squarers have lower error than other fixed-width squarers and are cost-effective.
- 社団法人電子情報通信学会の論文
- 2007-03-01
著者
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CHO Kyung-Ju
Dept. of Electronics & Information Engr. at Chonbuk National University
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CHUNG Jin-Gyun
Dept. of Electronics & Information Engr. at Chonbuk National University
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Cho Kyung-ju
Dept. Of Electronics & Information Engr. Chonbuk National University
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Chung Jin-gyun
Dept. Of Electronics & Information Engr. Chonbuk National University
関連論文
- Low Power Small Area Modified Booth Multiplier Design for Predetermined Coefficients(VLSI Design Technology and CAD)
- Adaptive Error Compensation for Low Error Fixed-Width Squarers(Computer Components)