An approach for downscaling images for real-time pattern detection (リコンフィギャラブルシステム)

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概要

• 論文の詳細を見る

• In this paper, we describe an approach for downscaling images for real-time pattern detection on FPGA. In our pattern detection system, a sequence of downscaled images (downscaled by α^k(k=0,1,2,…,n)) is generated, and regions in each image are compared with fixed size templates in order to detect patterns of various sizes in the original image. In this downscaling process, we need to (1) maintain the quality of the downscaled images to detect the patterns with less failures, (2) generate them in parallel with the pattern detection to achieve high performance by hiding the computation time, and (3) minimize the unit size and the number of the external memory banks required for the downscaling to leave more hardware resources for pattern detection units. In our approach based on an area-averaging method, all downscaled images have the same quality as when generated from the original image, and the computation is completely overlapped with the pattern detection. The downscaling units for α^3=1/2 occupy only 3% LUTs of Xilinx XC2V6000, and only one external memory bank is used for downscaling grayscale images.

• 社団法人電子情報通信学会の論文
• 2008-05-15

著者

• MARUYAMA Tsutomu

  Systems and Information Engineering, University of Tsukuba

• Maruyama Tsutomu

  Systems And Information Engineering University Of Tsukuba

• TANIDA Yoshifumi

  Systems and Information Engineering, University of Tsukuba

• Tanida Yoshifumi

  Systems And Information Engineering University Of Tsukuba

関連論文

• How fast is an FPGA in image processing? (リコンフィギャラブルシステム)
• Multiple Sequence Alignment Based on Dynamic Programming Using FPGA(Reconfigurable System and Applications,Reconfigurable Systems)
• An approach for downscaling images for real-time pattern detection (リコンフィギャラブルシステム)
• An implementation of a watershed algorithm based on connected components on FPGA (リコンフィギャラブルシステム)

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