A parallel multistage metaheuristic algorithm for VLSI floorplanning (数理モデル化と問題解決)
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概要
- 論文の詳細を見る
This paper proposes a parallel multistage metaheuristic algorithm to solve the floorplanning problem in VLSI layout design, in which the sequence-pair representation is adopted as the coding scheme of each chromosome. The proposed method consists of three stages, and the first and second ones are based on genetic algorithm, and the last one is based on tabu search. As the stage proceeds, a set of solutions are gradually refined. The proposed method is a parallel algorithm, running on a PC cluster. The proposed parallel floorplanning algorithm was implemented using the MPI (Message Passing Interface) library on a PC cluster. Experimental results show the effectiveness of the proposed algorithm.
- 一般社団法人情報処理学会の論文
- 2007-06-25
著者
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Nagayama Shinobu
Faculty Of Information Sciences Hiroshima City University
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Wakabayashi Shin'ichi
Faculty Of Information Sciences Hiroshima City University
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Shimazu Takayoshi
Faculty of Information Sciences, Hiroshima City University
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Shimazu Takayoshi
Faculty Of Information Sciences Hiroshima City University