Method to Obtain Low-Dislocation-Density Regions by Patterning with SiO_2 on GaAs/Si Followed by Annealing

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概要

• 論文の詳細を見る

• A method to obtain low-dislocation-density regions in GaAs on Si has been proposed. The method comprises performing the thermal cycle for GaAs, which is partially covered by SiO_2 patterning, on Si. Dislocations in the GaAs layer on Si are gathered at the periphery of the SiO_2 pattern due to surface stress modulation. This method yields the dislocation density of less than 10^5 cm^<-2> in the uncovered region

• 社団法人応用物理学会の論文
• 1994-10-15

著者

• Akiyama M

  Kyushu National Industrial Research Institute Agency Of Industrial Science And Technology Ministry O

• Akiyama Masahiro

  Semiconductor Technology Laboratory Oki Electric Industry Co. Ltd.

• Yamagishi Chitake

  Central Research Laboratory Nihon Cement Co. Lid.

• Ueda T

  Nuclear Engineering Research Laboratory University Of Tokyo

• YAMAGISHI Chouho

  Semiconductor Technology Laboratory, Oki Electric Industry Co., Ltd.

• UEDA Takashi

  Semiconductor Technology Laboratory, Research & Development Group, Oki Electric Industry Co., Ltd.

• YAMAICHI Eiji

  Semiconductor Technology Laboratory, Oki Electric Industry Co., Ltd.

• GAO Qingzhu

  Semiconductor Technology Laboratory, Oki Electric Industry Co., Ltd.

• Yamaichi E

  Semiconductor Technology Laboratory Oki Electric Industry Co. Ltd.

• Yamagishi Chouho

  Semiconductor Technology Laboratory Oki Electric Industry Co. Ltd.

• Gao Qingzhu

  Semiconductor Technology Laboratory Oki Electric Industry Co. Ltd.

• Ueda Takashi

  Semiconductor Technology Laboratory Oki Electric Industry Co. Ltd.

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