A Metal-Insulator-Semiconductor (MIS) Device Using a Ferroelectric Polymer Thin Film in the Gate Insulator

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概要

• 論文の詳細を見る

• A nonvolatile MIS memory device using a ferroelectric polymer thin film in the gate insulator is proposed. In the gate electrode of the device, a ferroelectric polymer thin film is sandwiched between two insulator films to prevent carrier injection into the polymer thin film. Al-SiO_2-P (VDF/TrFE)-SiO_2-Si capacitors were fabricated to evaluate the basic characteristics of the device by C-V measurement, and ferroelectric polarization reversal was observed in the capacitors. Based on the C-V measurements, MIS transistors were fabricated using a process which virtually self-aligns the effective gate area to the source/drain. It was shown that the MIS transistor could be electrically programmed and erased. The on/off ratio of the transistor was greater than 10^6.

• 社団法人応用物理学会の論文
• 1986-04-20

著者

• Yamauchi N

  Ntt Electrical Communications Lab. Ibaraki‐ken Jpn

• Yamauchi Noriyoshi

  Ntt Electrical Communication Laboratories

関連論文

• An Application of the Dry Liftoff Method by Molybdenum Oxide Sublimation to CMOS Isolation
• The Role of Stacked Insulating Layers on Thin-Film Electroluminescent Devices
• A Metal-Insulator-Semiconductor (MIS) Device Using a Ferroelectric Polymer Thin Film in the Gate Insulator

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