Direct Observation of Channel-Doping-Dependent Reverse Short Channel Effect Using Decoupled C-V Technuque

スポンサーリンク

概要

• 論文の詳細を見る

• A non-destructive high resolution "Decoupled C-V Technique" for small geometry devices has been developed and demonstrated to successfully extract the intrinsic channel capacitance of submicron metal-oxide-semiconductor field effect transistors (MOSFET's). The effective channel doping concentration calculated from the extracted intrinsic gate capacitance presents an obvious dopant concentration enhancement in the intrinsic channel region of submicron devices compared to that of long channel devices, as the channel implant dose increases beyond a critical value. The anomalous reverse short channel effect i.e. threshold voltage increases with channel length scaled down, is simultaneously observed on the heavily doped short channel devices. The self-consistency between the C-V and I-V measurement supports that the reverse short channel effect apparent in the submicron CMOS technology is due to the channel dopant enhancement induced by high dose channel implants for both N-channel and P-channel devices.

• 社団法人応用物理学会の論文
• 1994-01-30

著者

• GUO Jyh-Chyurn

  Institute of Electronics, National Chiao-Tung University

• HSU Charles

  Department of Electrical Engineering, National Tsing-Hua University

• Guo J‐c

  Industrial Technol. Res. Inst. Hsing Chu Twn

• Hsu Charles

  Department Of Electrical Engineering National Tsing-hua University

• Hsu Charles

  Deparment Of Electrical Engineering National Ching Hua University

• CHUNG Steve

  Department of Electronic Engineering, National Chiao Tung University

• Chung Steve

  Department Of Electrical Engineering National Tsing-hua University

• Guo Jyh-chyurn

  Institute Of Electronics And Epartment Of Electronics Engineering National Chiao-tung University:sub

関連論文

• P-SONOS and N-SONOS Transient Current and Field Modeling for Program and Erase
• Effective Channel Length and Source-Drain Series-Resistance Determination after Electrical Gate Length Verification of Metal-Oxide-Semiconductor Field-Effect Transistor
• A Unified 3-D Mobility Model for the Simulation of Submicron MOS Devices
• New Insight into the Degradation Mechanism of Nitride Spacer with Different Post-Oxide in Submicron LDDn-MOSFET's
• New Insight into the Degradation Mechanism of Nitride Spacer with Different Post-Oxide in Submicron LDD MOSFET's
• Charge Pumping Profiling Technique for the Evaluation of Plasma-Charging-Enhanced Hot-Carrier Effect in Short-N-Channel Metal-Oxide-Semiconductor Field-Effect Transistors
• Low-Temperature Hole Mobility Anomaly in Compensated P-Channel Metal-Oxide-Semiconductor Field-Effect Transistor
• Direct Observation of Channel-Doping-Dependent Reverse Short Channel Effect Using Decoupled C-V Technuque
• A New Observation of the Width Dependent Hot Carrier Effect in Shallow-Trench-Isolated P-MOSFET's
• New Degradation Mechanisms of Width-Dependent Hot Carrier Effect in Quarter-Micron Shallow-Trench-Isolated p-Channel Metal-Oxide-Semiconductor Field-Effect-Transistors
• Quantitative Investigation of Hot Carrier Induced Drain Current Degradation in Submicron Drain-Engineered Metal-Oxide-Semiconductor Field-Effect-Transistors : Semiconductors
• An Improved Low Voltage Programming Scheme Using Forward Bias Assisted Drain Avalanche Induced Hot Electron Injection on P-Channel EEPROMs
• New Mechanisms and the Characterization of Plasma Charging Enhanced Hot Carrier Effect in Deep-Submicron N-MOSFET's
• A New Symmetric Inductor Model for RF Circuits under Single-end and Differential Operations
• Performance and Reliability Improvement of Polycrystalline Silicon Thin Film Transistors by Deuterium Plasma Passivation
• Reliability Test Guideline for a 0.18μm Generation multi-Oxide CMOS Technology for System-on-Chip Applications
• Analysis of Structure-Dependent Hot Carrier Effect in Various LDD MOSFET's Using an Efficient Interface State Profiling Method
• Factitious Stroke Presenting for Acute Treatment
• A Novel Conductance Measurement Technique for Profiling the Lateral LDD n-Doping Concentrations of Submicron MOS Devices
• A Novel Technique for Investigating Hot-Electron-Induced Oxide Damages and Device Degradations in Submicron LDD n-MOSFET's
• A New Observation of the Reverse Short Channel Effect in Submicron n-MOSFET by Using Gate-Induced Drain Leakage Current Measurement
• Reliability Test Guidelines for a 0.18 μm Generation Multi-Oxide CMOS Technology for System-on-Chip Applications

もっと見る 閉じる

スポンサーリンク