Conductance(G)-Bias(L) Method for Interface States in MUS Structure

概要

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A conductance(G)-bias(V) method capable of revealing the interface states characteristics of MOS structure more easily is proposed instead of the conventional conductance(G)-frequency(F)method. The majority carrier density of the semiconductor surface is changed by a gate d.c.bias. Hence, the change of the time constant of the interface state (N_ss) is changed by the bias.The G- V method by considering the change of the time constant is developed on the basis of the conventional G-f method by the tunneling model. From the equivalent parallel conductanceG_p - V curve measured at l MHz, the capture cross-section 6_o and the maximum tunnel distanced are obtained 6_o =1.72 x 10^-10 cm^-2 and d=3.6A using a maximum G_p and a ratio of G_p to d.c. bias near the G_pmax. The measurable energy range of N_ss is wider than that of the G-f method N_ss is approximately constant around 7.6x10^11 cm^-2=eV^-1 near the G_pmax region where the energy range is from 0.l5eV to 0.25eV above the top of the valence band in the case of a p-type(0.9Ωcm) MOS sample with steam grown SiO_2.
社団法人応用物理学会の論文
1975-11-05