A Recycling Scheme for Layout Patterns Used in an Old Fabrication Technology (Special Section on JTC-CSCC '92)
スポンサーリンク
概要
- 論文の詳細を見る
When a new fabrication process is set up, especially in layout design for functional cells, of practical importance is how to make the best use of layout resources so far accumulated in old fabrication processes. Usually layout data of each element are expressed mostly in terms of positional coordinate values, and hence it is extremely tedious to modify them at every change of design rules for a new fabrication technology. To cope with this difficulty, the present paper describes an automatic recycling scheme for layout resources accumulated dedicatedly for functional cell generation. The main subject of this scheme is to transform given layout data into a layout description format expressed in layout parameters. Once layout data are parametrized, layout patterns of functional cells can be reconstructed simply by tuning up parameters in accordance with a new set of design rules. A part of implementation results are also shown.
- 社団法人電子情報通信学会の論文
- 1993-06-25
著者
-
Shigehiro Yuji
The Faculty Of Engineering Osaka University
-
Shirakawa Isao
the Faculty of Engineering, Osaka University
-
Shirakawa Isao
The Faculty Of Engineering Osaka University
関連論文
- A Recycling Scheme for Layout Patterns Used in an Old Fabrication Technology (Special Section on JTC-CSCC '92)
- Test Generation for Sequential Circuits Using Partitioned Image Computation (Special Section on VLSI Design and CAD Algorithms)
- A Distributed Routing System for Multilayer SOG (Special Section on the 5th Karuizawa Workshop on Circuits and Systems)