A Low-Power Implementation Scheme of Interpolation FIR Filters Using Distributed Arithmetic(Integrated Electronics)
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概要
- 論文の詳細を見る
This paper presents a low-power implementation scheme of interpolation FIR filters using distributed arithmetic (DA) The key idea of the proposed scheme involves look-up tables generating only nonnegative values. Thus, the proposed scheme can minimize the dynamic power consumption of interpolation FIR filters using DA without additional hardware When used for implementing a pulse shaping filter for CDMA2000 mobile stations, the proposed filter not only has almost the same hardware complexity as the conventional one ; it also has approximately 43% reduced power consumption
- 社団法人電子情報通信学会の論文
- 2003-11-01
著者
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Kang Sungho
Department of Electrical & Electronic Engineering, Yonsei University
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Kang Sungho
Department Of Electrical And Electronic Engineering Yonsei University
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Kim Jaeseok
Department Of Electrical And Electronic Engineering Yonsei University
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HWANG Sangyun
Department of Electrical and Electronic Engineering, Yonsei University
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HAN Gunhee
Department of Electrical and Electronic Engineering, Yonsei University
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Han Gunhee
Department Of Electrical And Electronic Engineering Yonsei University
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Hwang Sangyun
Department Of Electrical And Electronic Engineering Yonsei University
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HAN Gunhee
Department of Electrical & Electronic Engineering, Yonsei University
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