FPGA Design of Real-Time Watermarking Processor for 2DDWT-Based Video Compression(<Special Section>Papers Selected from 2003 International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC 2003))

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概要

• 論文の詳細を見る

• This paper proposed a new watermarking algorithm and implementation in hardware, by which the watermarking process and an image compression process can operate in conjunction, in parallel, and/or without degrading the performance of the compression process. The goal of the proposed watermarking scheme is to provide the bases to insist the ownership and to authenticate integrity of the watermark-embedded image by detecting the errors and their positions without the original image (blind watermarking). Our watermarking scheme is to replace the watermark with one or several bit-plane(s) of the DC subband after 2DDWT (2-Dimensional Discrete Wavelet Transform) decomposition which is the basic transformation in DWT-based image compression such as JPEG2000. If more than one bit-plane is involved, the position to embed each watermark bit is randomly selected among the bit-planes by a random number generated with an LFSR (Linear Feedback Shift: Register). Experimental results showed that for all the considered attacks except the high compression by JPEG, the error ratios in the extracted watermarks by our algorithm were below 3% and the extracted watermarks were unambiguously recognizable in all the cases. The hardware (FPGA)-implemented result could operate stably in 82 MHz clock frequency. This hardware was merged to DWT-based image compression codec which runs in a real-time in 66 MHz of clock frequency. This resulted in the real-time operation for codec and watermarking together in 66 MHz of clock frequency. The watermarking scheme used 4,037 LABs (24%) of the hardware: resource of APEX20KC EP20K400CF672-7 from Altera.

• 社団法人電子情報通信学会の論文
• 2004-06-01

著者

• Kim D‐w

  Dept. Of Semiconductor And New Materials Eng. Kwangwoon University

• SEO Young-Ho

  Divition of General Education, Kwang-woon University

• KIM Dong-Wook

  Dept. of Electronic Eng., Kwang-woon University

• SEO Young-Ho

  Dept. of Information and Communications Eng., Hansung University

• Seo Y‐h

  Dept. Of Information And Communications Eng. Hansung University

• Seo Young‐ho

  Divition Of General Education Kwang-woon University

• Seo Young-ho

  Dept. Of Electronic Materials Eng. Kwangwoon University

関連論文

• Low-Complexity Watermarking Based on Entropy Coding in H.264/AVC
• A New Coding Technique for Digital Holographic Video Using Multi-View Prediction(Advanced Image Technology)
• A Real-Time Image Compressor Using 2-Dimensional DWT and Its FPGA Implementation(VLSI Design Technology and CAD)
• Analysis of Injury Pattern in Soccer Player
• FPGA Design of Real-Time Watermarking Processor for 2DDWT-Based Video Compression(Papers Selected from 2003 International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC 2003))
• A Digital Watermarking Algorithm Using Correlation of the Tree Structure of DWT Coefficients(Papers Selected from 2003 International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC 2003))

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