A Fast Sorting VLSI Architecture for General-Purpose Standard Median Filters(Image Processing)(<Special Section>Applications and Implementations of Digital Signal Processing)

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概要

• 論文の詳細を見る

• A new sorting algorithm and architecture for fast median filter are proposed. This algorithm results in low area VLSI architecture producing low switching activity and without using feedback. The main idea is to employ the extra matrix for fast search operation of rank of oldest window element. We simulated and synthesized this algorithm using SYNOPSYS^<TM> and showed the sufficiency in real time operation.

• 社団法人電子情報通信学会の論文
• 2004-03-01

著者

• Cho Jun-dong

  School Of Information And Communication Sungkyunkwan University

• YU Hyeongseok

  School of Information and Communication, Sungkyunkwan University

• Yu Hyeongseok

  School Of Information And Communication Sungkyunkwan University

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