A Novel Digitally-Controlled Varactor for Portable Delay Cell Design(Physical Design)(<Special Section>VLSI Design and CAD Algorithms)

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概要

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• In this paper, a novel digitally-controlled varactor (DCV) for portable delay cell design is presented. The proposed varactor uses the gate capacitance differences of NAND/NOR gates under different digital control inputs to build up a digitally-controlled varactor. Then the proposed varactor is applied to design a high resolution delay cell and to achieve a fine delay resolution. Different types of NAND/NOR gates (2-input or 3-input) for DCV design are also investigated in this paper. The proposed DCV can be implemented with standard cells, thus it can be easily ported to different processes in a short time. A test chip fabricated on a standard 0.35μm CMOS 2P4M process proves that the proposed delay cell has a fine delay resolution about 1.55 ps. As a result, the proposed DCV exhibits finer resolution, better linearity, and better portability than traditional delay elements, and is very suitable for portable delay cell design.

• 社団法人電子情報通信学会の論文
• 2004-12-01

著者

• Chung Ching-Che

  Department of Computer Science & Information Engineering, National Chung-Cheng University

• Lee Chen-Yi

  Department of Electronics Engineering & Institute of Electronics, National Chiao-Tung University

• Lee C‐y

  Department Of Electronics Engineering And Institute Of Electronics National Chiao Tung University

• CHEN Pao-Lung

  Department of Electronics Engineering and Institute of Electronics National Chiao Tung University

• Chung Ching-che

  Department Of Electronics Engineering And Institute Of Electronics National Chiao Tung University

• Chen Pao-lung

  Department Of Electronics Engineering And Institute Of Electronics National Chiao Tung University:de

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