Abstraction and Optimization of Consistent Floorplanning with Pillar Block Constraints(Floorplan)(<Special Section>VLSI Design and CAD Algorithms)
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概要
- 論文の詳細を見る
The success in topdown design of recent huge system LSIs is in a seamless transfer of the information resulted from the high level design to the lower level of floorplanning. For the purpose, we introduce a new concept abstract floorplan which is included in the output of high level design. From the abstract floorplan, the pillar blocks are derived which are critical sets of blocks that are expected to determine the width and height of the chip, named the frame. Since the frame and pillar blocks are obtained in the high level stage, they are useful to keep the consistency in the low level physical design if we apply optimization regarding them as constraints. Experiments to MCNC benchmarks showed that abstract floorplanning by pillar blocks output a placement faithful to the one physically optimized block placement with respect to the chip area and the wire-length.
- 社団法人電子情報通信学会の論文
- 2004-12-01
著者
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TAKASHIMA Yasuhiro
Department of Pediatrics, Kobe University School of Medicine
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Takashima Yasuhiro
The Department Of Information And Media The University Of Kitakyushu
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Takashima Yasuhiro
The Department Of Electrical And Electronic Engineering Tokyo Institute Of Technology
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Takashima Yasuhiro
Department Of Information And Media The University Of Kitakyushu
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NAKATAKE Shigetoshi
Department of Information and Media Engineering, The University of Kitakyushu
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Nakatake S
The Department Of Information And Media The University Of Kitakyushu
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Kajitani Y
Department Of Electrical And Electronic Engineering Tokyo Institute Of Technology
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Kajitani Yoji
The Department Of Electrical And Electronic Engineering Tokyo Institute Of Technology
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Kajitani Yoji
Department Of Electrical And Electronic Engineering Tokyo Institute Of Technology
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FU Ning
Department of Information and Media, the University of Kitakyushu
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Fu Ning
The Department Of Information And Media The University Of Kitakyushu:the Jedat Innovation Inc.
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Takashima Youichi
The Department Of Information And Media The University Of Kitakyushu
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Nakatake Shigetoshi
Department Of Information And Media Engineering The University Of Kitakyushu
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