Experimental Characterization and Modeling of Transmission Line Effects for High-Speed VLSI Circuit Interconnects(Special lssue on Recent Developments in Guided-Wave Problems)

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概要

• 論文の詳細を見る

• IC interconnect transmission line effects due to the characteristics of a silicon substrate and current return path impedances are physically investigated and experimentally characterized. With the investigation, a novel transmission line model is developed, taking these effects into account. Then an accurate signal delay on the IC interconnect lines is analyzed by using the transmission line model. The transmission line effects of the metal-insulator-semiconductor IC interconnect structure are experimentally verified with s-parameter-based wafer level signaltransient characterizations for various test patterns. They are designed and fabricated with a 0.35μm CMOS process technology. Throughout this work, it is demonstrated that the conventional ideal RC-or RLC-model of the IC interconnects without considering these detailed physical phenomena is not accurate enough to verify the pico-second level timing of high-performance VLSI circuits.

• 社団法人電子情報通信学会の論文
• 2000-05-25

著者

• Yungseon Eo

  Integrated Electronics Laboratory Department Of Electronic Engineering Hanyang University

• Seongtae Yoon

  School Of Information And Communication Engineering Sungkyunkwan University

• Woojin JIN

  Integrated Electronics Laboratory, Department of Electronic Engineering, Hanyang University

• Seongtae YOON

  Integrated Electronics Laboratory, Department of Electronic Engineering, Hanyang University

• Jungsun KIM

  Integrated Electronics Laboratory, Department of Electronic Engineering, Hanyang University

• Jungsun Kim

  Integrated Electronics Laboratory Department Of Electronic Engineering Hanyang University

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• Experimental Characterization and Modeling of Transmission Line Effects for High-Speed VLSI Circuit Interconnects(Special lssue on Recent Developments in Guided-Wave Problems)

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