Self-Reconstruction of 3D Mesh Arrays with 11/2-Track Switches by Digital Neural Circuits (Special Issue on Integrated Electronics and New System Paradigms)

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Using Hopfield-type neural network model, we present an algorithm for reconstructing 3D mesh processor arrays using single-track switches where spare processors are laid on the six surfaces of a 3D array and show its effectiveness in terms of reconstruction rate and computing time by computer simulation. Next, we show how the algorithm can be realized by a digital neural circuit. It consists of subcircuits for finding candidate compensation paths, deciding whether the neural system reaches a stable state and at the time the system energy is minimum, and subcircuits for neurons. The subcircuit for each neuron including the other subcircuits can only be made with 16 gates and two flip-flops. Since the state transitions are done in parallel, the circuit will be able to find a set of compensation paths for a fault pattern very quickly within a time less than 1 μs. Furthermore, the hardware implementation of the algorithm leads to making a self-reconfigurable system without the aid of a host computer.
社団法人電子情報通信学会の論文
1999-09-25