A Novel Sensing Scheme with On-Chip Page Copy for Flexible Voltage NAND Flash Memories (Special Issue on ULSI Memory Technology)
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概要
- 論文の詳細を見る
This paper describes a newly developed sensing scheme with a bit-by-bit program verify technique for NAND flash disk systems. This sensing scheme achieves good noise immunity for large capacitive coupling between bitlines, and makes NAND flash memories operable for flexible power supply voltages including both 3.3 V and 5 V. A highly reliable read operation is performed for power supply voltages above 3 V and a bitline-bitline coupling ratio below 50%. The sensing scheme also achieves an intelligent page copy function with 20% reduction in time and without external buffers and CPU resources.
- 社団法人電子情報通信学会の論文
- 1996-06-25
著者
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Iwata Yoshihisa
Semiconductor Device Engineering Laboratory Toshiba Corporation
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NAKAMURA Hiroshi
ULSI Research Laboratories, Toshiba R&D Center, TOSHIBA CORPORATION
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MIYAMOTO Jun-ichi
Semiconductor Device Engineering Laboratory, TOSHIBA CORPORATION
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IMAMIYA Ken-ichi
Semiconductor Device Engineering Laboratory, TOSHIBA CORPORATION
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SUGIURA Yoshihisa
Semiconductor Device Engineering Laboratory, TOSHIBA CORPORATION
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OODAIRA Hideko
ULSI Research Laboratories, Toshiba R&D Center, TOSHIBA CORPORATION
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Oodaira Hideko
Ulsi Research Laboratories Toshiba R&d Center Toshiba Corporation
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Imamiya Ken-ichi
Semiconductor Device Engineering Laboratory Toshiba Corporation
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Miyamoto Jun-ichi
Semiconductor Device Engineering Laboratory Toshiba Corporation
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Sugiura Yoshihisa
Semiconductor Device Engineering Laboratory Toshiba Corporation
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Nakamura H
Kddi R & D Laboratories Inc.
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Imamiya K
Semiconductor Device Engineering Laboratory Toshiba Corporation
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