Transistor Leakage Fault Diagnosis with I_DDQ and Logic Information

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概要

• 論文の詳細を見る

• This paper proposes a new methodology for diagnosing transistor leakage faults with information on I_DDQ and logic values at primary output lines. A hierarchical approach is proposed to identify the faults that do not exist in the circuit through comparing their I_DDQ and logic behaviors predicted by simulation with observed responses. Several techniques for handling intermediate faulty voltages in fault simulation are also proposed. Further, an approach is proposed to generate diagnostic vectors based on I_DDQ information. In addtion, a method for identifying I_DDQ equivalent faults is proposed to reduce the time needed for diagnostic vector generation and to improve diagnostic resolution. Experimental results show that the proposed methodology often confines diagnosed faults to only a few gates.

• 社団法人電子情報通信学会の論文
• 1998-04-25

著者

• WEN Xiaoqing

  Kyushu Institute of Technology

• Tamamoto H

  The Department Of Information Engineering Akita University

• Tamamoto Hideo

  The Department Of Information Engineering Akita University

• Saluja Kewal

  Department Of Electrical And Computer Engineering University Of Wisconsin-madison

• Saluja Kewal

  Univ. Wisconsin‐madison Usa

• Wen Xiaoqing

  Faculty Of Computer Science And Systems Engineering Kyushu Institute Of Technology

• Kinoshita Kozo

  Faculty Of Informatics Osaka Gakuin University

• Xiaoqing WEN

  the Department of Information Engineering, Akita University

• SALUJA Kewal

  the Department of Electrical and Computer Engineering, University of Wisconsin

• KINOSHITA Kozo

  the Department of Applied Physics, Osaka University

• Xiaoqing Wen

  Department Of Information Engineering Mining College Akita University

• Xiaoqing Wen

  The Department Of Information Engineering Akita University

• Saluja Kewal

  The Department Of Electrical And Computer Engineering University Of Wisconsin

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