MINC: Multistage Interconnection Network with Cache Control Mechanism
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概要
- 論文の詳細を見る
A novel approach to the cache coherent Multi-stage Interconnection Network (MIN) called the MINC (MIN with Cache control mechanism) is proposed. In the MINC, the directory is located only on the shared memory using the Reduced Hierarchical Bit-map Directory schemes (RHBDs). In the RHBD, the bit-map directory is reduced and carried in the packet header for quick multicasting without accessing the directory in each hierarchy. In order to reduce unnecessary packets caused by compacting the bit map in the RHBD, a small cache called the pruning cache is introduced in the switching element. The simulation reveals the pruning cache works most effectively when it is provided in every switching element of the first stage, and it reduces the congestion more than 50% with only 4 entries. The MINC cache control chip with 16 inputs/outputs is implemented on the LPGA (Laser Programmable Gate Array), and works with a 66 MHz clock.
- 社団法人電子情報通信学会の論文
- 1997-09-25
著者
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AMANO Hideharu
the Department of Information and Computer Science, Keio University
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Kamei Takayuki
The Department Of Computer Science Keio University:toshiba Corporation
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HANAWA Toshihiro
the Department of Computer Science, Keio University
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YASUKAWA Hideki
the Department of Computer Science, Keio University
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NISHIMURA Katsunobu
the Department of Computer Science, Keio University
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Amano Hideharu
The Department Of Computer Science Keio University
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Hanawa Toshihiro
The Department Of Computer Science Keio University
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Nishimura Katsunobu
The Department Of Computer Science Keio University
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Yasukawa Hideki
The Department Of Computer Science Keio University:toshiba Corporation
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