Design of Autonomous TPG Circuits for Use in Two-Pattern Testing

スポンサーリンク

概要

• 論文の詳細を見る

• A method to design one-dimensional cellular arrays to be used as TPG circuits of BIST is described. The interconnections between cells are not limited to adjacent ones but allowed to some neighbors. Completely regular structures that have full-transition coverages for every k-dimensional sub-space of state variables are first shown. Then, almost regular arrays which can operate on maximum cycles are derived based on fast parallel implementations of LFSRs.

• 社団法人電子情報通信学会の論文
• 1995-07-25

著者

• Seki Seiji

  新情報処理開発機構 つくば研究センター

• Furuya Kiyoshi

  Faculty Of Science And Engineering Chuo University

• Seki Seiji

  Faculty of Science and Engineering, Chuo University

• McCluskey Edward

  Computer Systems Laboratory, Stanford University

• Seki Seiji

  Faculty Of Science And Engineering Chuo University

関連論文

• Design of Autonomous TPG Circuits for Use in Two-Pattern Testing
• Stuck-Open Fault Detectabilities of Various TPG Circuits for Use in Two-Pattern Testing
• Two-Pattern Test Capabilities of Autonomous TGP Circuits (Special Issue on VLSI Testing and Testable Design)

スポンサーリンク