An Improved Algorithm for the Net Assignment Problem

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概要

• 論文の詳細を見る

• In this paper, we consider the net assignment problem in the logic emulation system. This problem is also known as the board-level-routing problem. There are field programmable logic arrays (FPGAs) and crossbars on an emulator board. Each FPGA is connected to each crossbar. Connection requests between FPGAs are called nets, and FPGAs are interconnected through crossbars. We are required to assign each net to the suitable crossbar. This problem is known to be NP-complete in general. A polynomial time algorithm is known for a certain restricted case, in which we treat only 2-terminal nets. In this paper we propose a new polynomial time algorithm for this case.

• 社団法人電子情報通信学会の論文
• 2001-05-01

著者

• Hirata T

  Nagoya Univ. Aichi Jpn

• Hirata Tomio

  School Of Engineering Nagoya University

• ONO Takao

  School of Engineering, Nagoya University

• Ono Takao

  School Of Engineering Nagoya University

• HIRATA Tomio

  School of Engineering, Nagoya University

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