Non-isothermal Device Simulation Taking Account of Transistor Self-Heating and In-Chip Thermal Interdependence (Special Section on VLSI Design and CAD Algorithms)

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概要

• 論文の詳細を見る

• A non-isothermal device simulation, consisting of solving heat flow equation three-dimensionally together with other semiconductor equations two-dimensionally, is reported for various arrangements of a pluralty of transistors mounted on a single chip. These arrangements are intended to simulate the real situation in an IC chip whereas a three-dimensional solution of the heat flow equation is aimed at accurately determining the thermal interdependence among individual transistors. As a result, the drain current versus drain voltage characteristics of a miniaturized transistor is found to exhibit a heat-induced negative resistance region.

• 一般社団法人電子情報通信学会の論文
• 1997-10-25

著者

• Kawashima H

  Toshiba Corp. Kawasaki‐shi Jpn

• Kawashima Hirobumi

  Hosei University Dang Laboratory

• DANG(or DAN)

  Hosei University

• KAWASHIMA Hirobumi

  Hosei University

関連論文

• Non-isothermal Device Simulation Taking Account of Transistor Self-Heating and In-Chip Thermal Interdependence (Special Section on VLSI Design and CAD Algorithms)
• Non-Isothermal Device Simulation of Gate Switching and Drain Breakdown Characteristics of Si MOSFET in Transient State (Special Issue on TCAD for Semiconductor Industries)

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