Fabrication and Characterization of Ferroelectric-Gate Memory Devices Using (Bi, La)_4 Ti_3O_<12>/HfO_2 Structure (AWAD2003 (Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices))

概要

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Ferroelectric gate FET's with (Bi, La)_4Ti_3O_<12> (BLT)/HfO_2 structure were fabricated and characterized. In this study, the memory devices were designed by using 0.8 μm design-rule and fabricated on 5-inch-size Si wafer with well-optimized CMOS compatible fabrication processes for the first time. We obtained excellent device characteristics and good memory operations of the fabricated n-ch and p-ch MFIS-FET's. We also confirmed by evaluating the gate voltage and gate size dependences of device properties that the fabricated devices showed quantitatively reasonable ferroelectric memory operations. It can be evidently suggested from the obtained results that the gate-stack of BLT/HfO_2 is one of the promising material combinations for MFIS-type ferroelectric memory devices.
社団法人電子情報通信学会の論文
2003-06-25