2B11 アナログ階調表示強誘電性液晶 : ヒステリシスに及ぼすパラメータの検討

概要

論文の詳細を見る
We have found a new analog gray-scale technique for ferroelectric liquid crystal (FLC) displays ^<1)>. The new technique involves the micro-domain texture, and the addition of nanometer-scale particles into the FLC mixture enables a wide distribution of threshold voltages within one pixel. This threshold-voltage broadening was found to be caused by an increase in the distribution of the smectic-layer tilt angles ^<3)>. The hysteresis in the voltage-transmittance curve is one of the crucial problems for realizing analog gray-scale displays. We report that the causes of the hysteresis are the relaxation of the polarization in the alignment layers brought about by the spontaneous polarization and the instability of the memory effect. In order to accelerate the depolarization in the alignment layers, we have increased the conductivity and controlled frame rates to clarify the relationship between the memory stability and the hysteresis.
日本液晶学会の論文
1996-09-30