Accelerating Boolean Matching Using Bloom Filter
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概要
- 論文の詳細を見る
Boolean matching is a fundamental problem in FPGA synthesis, but existing Boolean matchers are not scalable to complex PLBs (programmable logic blocks) and large circuits. This paper proposes a filter-based Boolean matching method, F-BM, which accelerates Boolean matching using lookup tables implemented by Bloom filters storing pre-calculated matching results. To show the effectiveness of the proposed F-BM, a post-mapping re-synthesis minimizing area which employs Boolean matching as the kernel has been implemented. Tested on a broad selection of benchmarks, the re-synthesizer using F-BM is 80X faster with 0.5% more area, compared with the one using a SAT-based Boolean matcher.
- (社)電子情報通信学会の論文
- 2010-10-01
著者
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Zhang Chun
State Key Lab Of Asics And Systems Fudan University
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HU Yu
Electrical and Computer Engineering Department, University of Alberta
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WANG Lingli
State Key Lab of ASICs and Systems, Fudan University
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HE Lei
Electrical Engineering Department, UCLA
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TONG Jiarong
State Key Lab of ASICs and Systems, Fudan University
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He Lei
Electrical Engineering Department Ucla
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Tong Jiarong
State Key Lab Of Asics And Systems Fudan University
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Wang Lingli
State Key Lab Of Asics And Systems Fudan University
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Hu Yu
Inst. Of Computing Technol. Chinese Acad. Of Sci. Beijing Chn