Asymmetrical DC Link Voltage Configuration for a Diode-Clamped Inverter
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概要
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There is a trade off between a number of output voltage levels and the reliability and efficiency of a multilevel converter. A new configuration of diode-clamped multilevel inverters with a different combination of DC link capacitors voltage has been proposed in this paper. Two different symmetrical and asymmetrical unequal arrangements for a four-level diode-clamped inverter have been compared, in order to find an optimum arrangement with lower switching losses and optimised output voltage quality. The simulation and hardware results for a four-level inverter show that the asymmetrical configuration can obtain more output voltage levels with the same number of components compared with a conventional four-level inverter and this will lead to the reduction of the harmonic content of the output voltage. A new family of multi-output DC-DC converters with a simple control strategy has been utilised as a front-end converter to supply the DC link capacitor voltages for the optimised configuration.
- 2010-02-01
著者
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ZARE Firuz
School of Electrical Engineering, Queensland University of Technology
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Nami Alireza
School of Electrical Engineering, Queensland University of Technology
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Ghosh Arindam
School of Electrical Engineering, Queensland University of Technology
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Nami Alireza
School Of Electrical Engineering Queensland University Of Technology
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Nami Alireza
School Of Electrical Engineering Queensland Univ. Of Technol.
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Zare Firuz
School Of Electrical Engineering Queensland Univ. Of Technol.
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Ghosh Arindam
School Of Electrical Engineering Queensland University Of Technology
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