Miyahara Kazuya | ²The School of Science and Engineering, Waseda University, Shinjuku, Tokyo 169-8555

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概要

• 同名の論文著者
• ²The School of Science and Engineering, Waseda University, Shinjuku, Tokyo 169-8555の論文著者

論文 | ランダム

• Circuit-Level Electrothermal Simulation of Electrostatic Discharge in Integrated Circuits (Special lssue on SISPAD'99)
• 2-Dimensional Simulation of FN Current Suppression Including Phonon Assisted Tunneling Model in Silicon Dioxide
• 3-D Topography and Impurity Integrated Process Simulator (3-D MIPS) and Its Applications (Special Issue on TCAD for Semiconductor Industries)
• A Built-In Self-Test for ADC and DAC in a Single-Chip Speech CODEC (Special Section on Analog Circuit Techniques for System-on-Chip Integration)
• A 28 mW 16-bit Digital Signal Processor for the PDC Half-Rate CODEC (Special Issue on Low-Power LSI Technologies)

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